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Research to Improve Image Contrast in EUV Lithography
MTL Seminar Series
Tim Brunner, ASML
Abstract
EUV lithography is now used to manufacture the most advanced integrated circuits, including memory, logic and AI chips, but Moore’s Law demands constant improvements. The NXE system is our 0.33NA platform which continues to evolve with better throughput via greater EUV source power, smaller Edge Placement Errors (EPE) and higher uptime. One possibility for further EPE reduction is to increase image contrast through the use of advanced exposure methods such as Dual Monopole.
Bio
Tim Brunner holds a B.A. from Carleton College and a Ph.D from MIT, all in physics. He has worked in the area of lithography for chip production since 1981. After many years at IBM, he joined ASML in 2019, working in the Technology Development Center.